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10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2007)
April 11th - April 13th, 2007

Collegium Novum, Jagiellonian University
Kraków, Poland

http://www.iele.polsl.gliwice.pl/ddecs2007/

CALL FOR PARTICIPATION

Overview -- Scope-- Highlights-- Activities-- Registration -- Proceedings -- Accompanying Event -- Committees

Overview

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The IEEE DDECS workshops offer a forum for exchanging ideas, presenting research results and practical applications in the design, verification, test and diagnosis fields of electronic circuits and systems. Over the years, DDECS has undergone healthy growth, in terms of both the number of paper submissions and the number of attendees. It has now become one of the major scientific events organized in Central Europe in the area of design and test. This year we celebrate the 10th anniversary of the DDECS series of workshops.

Scope

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DDECS 2007 takes place in Kraków, one of the oldest and most beautiful cities in Poland. Workshop participants will meet in a historic building of Collegium Novum at the famous Jagiellonian University. The workshop is organized under the honorary patronage of the Major of the City of Kraków by the Institute of Electronics of the Silesian University of Technology, and is sponsored by the IEEE Computer Society and Test Technology Technical Council (TTTC).

Highlights

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WORKSHOP HIGHLIGHTS

The technical program consists of:

  • Three keynote speeches
  • 12 regular sessions with 40 paper presentations
  • 3 poster sessions composed of 33 regular and 3 student posters
  • Special notes about IEEE Computer Society, TTTC activities, and FP7 initiatives from a European Commission

Keynote Presentations will be given by:

  • Prof. Krishnendu CHAKRABARTY (Duke University) "Design and Test of Microfluidic Biochips"
  • Prof. Daniel D. GAJSKI (University of California at Irvine) "New Strategies for System-Level Design"
  • Dr. Janusz RAJSKI (Mentor Graphics Corporation) "Logic Diagnosis and Yield Learning"

Regular sessions include:

  • DfT & Defect Analysis
  • SOC Design & Test
  • Fault Analysis & Circuit Reliability
  • FPGA-Based Design
  • Memory Testing
  • Logic Design
  • Fault Tolerance I
  • Analog & RF Design
  • Fault Tolerance II
  • Test Quality & Test Generation
  • Model Checking & Debugging
  • Analog & MEMS testing

Policy
Yervant Zorian (Virage Logic) IEEE TTTC (senior past chair) will present IEEE Computer Society and TTTC recent policies.

European Commission Address
There will be an address from the European Commission by Philippe Reynaert from DG INFSO Embedded Systems unit on European Technology Platforms and Joint Technology Initiatives. A special session with Philippe Reynaert will take place on Friday, April 13th that will explain the potential for participation in the ARTEMIS Technology Platform.

Sponsor Session
Evatronix SA and Mentor Graphics Corporation, will present their product strategies during the sponsors session. 

Activities

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SOCIAL ACTIVITIES
DDECS workshop was always been known for an excellent program of social activities. In Krakow we continue this tradition with a Welcome Reception at City Hall, dinner at the famous Wierzynek Restaurant, a visit to unique medieval Wieliczka Salt Mine, and a banquet at Zalesie Folwark.

Registration

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REGISTRATION
Please refer to DDECS 2007 web site at www.iele.polsl.gliwice.pl/ddecs2007 for information regarding the program, accommodation, accompanying events, and registration.  Please, direct all inquiries concerning registration to DDECS07-reg@ciel.pl. Early registration is available until the end of March for those paying with credit cards.

Proceedings

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DDECS proceedings are published with the IEEE Computer Society copyright and hosted in the IEEE digital library Xplore.

Accompanying Event

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ACCOMPANYING EVENT - CCE 2007
DDECS 2007 will be accompanied by the CCE 2007 workshop on "Challenges in Collaborative Engineering". CCE 2007 will run in parallel to DDECS in the Collegium Maius of the Jagiellonian University.

For more information on CCE, visit: http://cce.ecolleg.org/2007

Committees

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General Chair
Elena Gramatová - Slovak Academy of Sciences (SK)
gramatova.ui@savba.sk

General Vice-Chair
Adam Pawlak - Silesian University of Technology (PL)
Adam.Pawlak@polsl.pl

Program Chair
Patrick Girard - LIRMM (F)
girard@lirmm.fr

Program Vice-Chair
Andrzej Kraśniewski - Warsaw University of Technology (PL)
andrzej@tele.pw.edu.pl

Organizing Committee Chair
Tomasz Garbolino - Silesian University of Technology (PL)
Tomasz.Garbolino@polsl.pl

Publicity Chair
Raimund Ubar - Tallinn Technical University (EST)
raiub@pld.ttu.ee

Steering Committee
T.Garbolino (PL)
E.Gramatová (SK)
E.Hrynkiewicz (PL)
Z.Kotásek (CZ)
A.Kraśniewski (PL)
H.Manhaeve (B)
E.J.Marinissen (NL)
O.Novák (chair,CZ)
A.Pawlak (PL)
A.Pataricza (H)
S.Piestrak (PL)
M.Renovell (F)
B.Straube (D)
R.Ubar (EST)
K.Vlcek (CZ)

Honorary members:
A.Hławiczka (PL)

Program Committee
E. Aas (N)
J. Becker (D)
D. Borrione (F)
G. Carlsson (S)
K. Chakrabarty (USA)
S. Chakravarty (USA)
M. Danek (CZ)
R. Drechsler (D)
L. Entrena (E)
B. Feher (H)
J. Figueras (E)
T. Garbolino (PL)
P. Girard (F)
M. Glesner (D)
S. Goel (NL)
E. Gramatová (SK)
S. Hellebrand (D)
J. Henkel (D)
A. Hlawiczka (PL)
E. Hrynkiewicz (PL)
L. Józwiak (NL)
Z. Kotásek (CZ)
A. Krasniewski (PL)
K. Kuchcinski (S)
C. Landrault (F)
E. Larsson (S)
R. Leveugle (F)
H. Manhaeve (B)
N. Mukherjee (USA)
N. Nicolici (CDN)
F. Novak (SLO)
O. Novák (CZ)
A. Pataricza (H)
A. Pawlak (PL)
Z. Peng (S)
S. Piestrak (F)
W. Pleskacz (PL)
A. Pleštil (CZ)
P. Prinetto (I)
M. Rencz (H)
M. Renovell (F)
B. Rouzeyre (F)
G. Russel (GB)
D. Sciuto (I)
J. Segura (E)
L. Sekanina (CZ)
O. Sentieys (F)
M. Sonza Reorda (I)
J. Sosnowski (PL)
Z. Stamenkovic (D)
A. Steininger (A)
V. Stopjaková (SK)
B. Straube (D)
I. Teixeira (P)
J. Teixeira (P)
H. Tenhunen (S)
J. Tyszer (PL)
R. Ubar (EST)
H. Vierhaus (D)
K. Vlcek (CZ)
H. Wunderlich (D)
Y. Zorian (USA)

For more information, visit us on the web at: http://www.iele.polsl.gliwice.pl/ddecs2007/

The DDECS Workshop series is organized by the Institute of Electronics, Silesian University of Technology in Gliwice and is sponsored by the IEEE Computer Society - Test Technology Council (TTTC).


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

SENIOR PAST CHAIR
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TTTC 2ND VICE CHAIR
Joan FIGUERAS
Universitat Politècnica de Catalunya - Spain
Tel. +34-93-401-6603
E-mail figueras@eel.upc.es

FINANCE
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

DESIGN & TEST MAGAZINE
Tim CHENG
University of California, Santa Barbara - USA
Tel. +1-805-893-72942
E-mail timcheng@ece.ucsb.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG

Lucent Technologies
- USA
Tel. +1-732-949-5539
E-mail chenhuan@lucent.com

TECHNICAL ACTIVITIES
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

ASIA & SOUTH PACIFIC
Hideo FUJIWARA
Nara Institute of Science and Technology - Japan
Tel. +81-74-372-5220
E-mail fujiwara@is.aist-nara.ac.jp

LATIN AMERICA
Marcelo LUBASZEWSKI
Federal University of Rio Grande do Sul - Brazil
Tel. +34-93-401-6603
E-mail luba@vortex.ufrgs.br

NORTH AMERICA
William R. MANN
Tel. +1-949-645-3294
E-mail william.mann@ieee.org

COMMUNICATIONS
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

 

PAST CHAIR
Paolo PRINETTO
Politecnico di Torino - Italy
Tel. +39-011-564-7007
E-mail Paolo.Prinetto@polito.it

TTTC 1ST VICE CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

SECRETARY
Christian LANDRAULT
LIRMM - France
Tel. +33-4-674-18524
E-mail landrault@lirmm.fr

INTERNATIONAL TEST CONFERENCE
Jill E. SIBERT
Raspberry Comm.
- USA
Tel. +1-484-894-1111
E-mail jill_sibert@raspberrycom.com

TEST WEEK COORDINATION
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

University of Piraeus
- Greece
Tel. +30-210-414-2372
E-mail dgizop@unipi.gr

STANDARDS
Rohit KAPUR

Synopsys
- USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Zebo PENG
Linköping University - Sweden
Tel. +46-13-282-067/-281-000
E-mail zpe@ida.liu.se

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino - Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it


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